The Function Generator is an LWDAQ device that provides a programmable output with an arbitrary waveform whose frequency can vary between DC to 10 MHz with a peak to peak voltage of 5V into a 50 ohm load.
The device has several main components: a CPLD, RAM, DAC, adjustable gain amplifier, adjustable RC filters, and DC/DC converters. The CPLD provides the LWDAQ interface, RAM interface, and output to DAC resistors. The adjustable gain amplifier provides discrete output gain levels, and the RC filters provide filtering based on output frequency and output sample rate. DC/DC converters are provided to run from an external supply to circumvent the maximum current limits defined by the LWDAQ specification and allow the output to achieve 5V peak to peak into a 50 ohm load.
The programmable logic chip takes the LWDAQ command word and defines a 5 bit control address and 8 bit control data while preserving the WAKE and LB functionality. The definition is as follows:
Control Data: DC16 down to DC9
Control Address: DC5 down to DC1
Within the 5 bit address space, we define all the functions necessary for the function generator. All addresses are write-only. A list of available functions are defined as follows:
Control Address Contents
0-3 Data address(bytes 0..3)
6 RC Filter register
7 Analog gain register
8 Start waveform playback
9 Stop waveform playback
12 RAM Portal
13-15 Repeat Counter(bytes 0..3)
17 Data Latch
18 Waveform sample period register
We detail the function of each register below.
The function generator on-board memory is a single 10-ns, static RAM chip organized as 2M x 8 bits to provide 2 Mbytes of storage space. The function generator stores waveform samples in the RAM location pointed to by the data address. After the function generator stores a byte in RAM, it increments the data address. We set the data address by writing to the data address location on the function generator. The address counter increments itself whenever the function generator stores a byte.
RC Filter Register
The function generator provides an adjustable RC low pass filter. There are 4 parallel resistors and 4 parallel capacitors which can be selected/deselected via the RC Filter Register. The intent of this filter is to smooth the discrete sample to sample transition in the digitally created waveform. The register is 8 bits. Each bit selects(1)/deselects(0) a single resistor or capacitor. The register is set up as follows(MSB first): R1 R2 R3 R4 C1 C2 C3 C4.
Analog Gain Register
The analog gain register provides discrete gain control of the DAC output. Four parallel resistors form a voltage divider with the DAC resistors to alter the signal level entering the first op-amp stage. The register is setup as follows(MSB first): X X X X R1 R2 R3 R4. 'X' is a don't care.
Start Waveform Playback
The heart of the function generator is a waveform playback state machine. Writing to the start waveform playback register enables the state machine. The state machine runs continually until instructed to stop.
Stop Waveform Playback
Writing to the stop waveform playback register disables the waveform playback state machine. The state machine should always be stopped during RAM downloads.
When we write a byte to the RAM portal, we write the byte in the controller memory at the location pointed to by the data address. After we write to the RAM portal, the controller increments the data address, so that the next write to the RAM portal will be stored in the controller RAM.
The repeat counter sets the length of data that will get downloaded to RAM.
The data address and repeat counter bytes need to be stored locally within the controller so that the waveform playback state machine may reload these values at the end of each cycle through RAM. Writing to the data latch register shifts these values into their respective registers within the controller.
Waveform Sample Period Register
The waveform playback state machine reads out data from the on-board RAM and places these values onto the DAC resistors to create a waveform. The master clock is divided down by the value stored in this register to create a sample clock. The sample clock period defines the length of time each DAC value is held on the DAC resistors.
At a high level we first determine the shape, amplitude, and frequency of the desired output waveform. We then choose the number of waveform samples, sample period, digital amplitude of waveform samples, analog gain, and RC filter capacitors. There is a lot of flexibility and interaction among these parameters to produce a good output. These interactions are described below.
Relationship between Frequency, Number of Samples, Sample Period, and RC Filtering
The function generator utilizes a waveform playback state machine which reads a sample from RAM and presents the data to the DAC on one clock cycle, then holds it for one more clock cycle while the controller retrieves the next sample, then repeats. The state machine operates off the sample clock, whose value is 80 MHz divided by the value stored in the sample period register. The sample period register is 16 bits. The minimum decimal value we can set the sample period register is 1. The equation relating the frequency, number of samples, and sample period is as follows:
frequency = 40 MHz / (#samples * (clock_divider +1)),
where clock_divider= decimal value store in the sample period register
ultimately, we need to set the sample period register given the desired frequency, so we re-write the equation:
clock_divider = [40 MHz / (#samples * frequency)] - 1
The 40 MHz number in the above equations is attributed to the 80 MHz master clock and the nature of the waveform state machine utilizing 2 states to move from sample to sample. When we plug in the minimum number of samples of 2, and the minimum clock divider value of 1, we arrive at the maximum output frequency of 10 MHz. One can see that we can produce a square wave using a 2 sample waveform. If we wanted a sine wave, we can adjust the RC filters to construct a sine wave from a square wave.
INSERT FREQUENCY/SAMPLE/RC FILTER CHART HERE
We strive to balance the length of time it takes to download a set of data defining a waveform with the desire to keep the sample period as small as possible. Downloading a single byte to the on-board RAM takes close to 500 us. As we increase the number of waveform samples into the 1000's, we get download times in the range of seconds.
We utilize RC low pass filters to smooth the sample to sample discrete steps. The RC filter bank provides 16 filter values to choose from. To adequately smooth a discrete step, we choose a sample period and RC filter such that we meet the minimum smoothing as represented by the following equation:
sample period < 3*2*pi*RC
In the case where we want to ensure the output frequency amplitude is not decreased by the RC filter, we impose the following limitation:
output frequency < (1/2)Fc, where Fc= 1/(2*pi*RC).
This relationship suggests that the output amplitude will not be reduced as long as the output frequency is roughly 2x less than the -3dB corner frequency set by the RC filter.
The 'Set Output' button provides the simplest means of controlling the function generator's output. The user chooses the Waveform Type, Frequency, and Output Voltage. Pressing the button enables the output. The following lower level commands occur upon button press:
1. Output disabled.
2. Input frequency is compared against set ranges to determine the appropriate number of waveform samples.
>=1MHz use 5 samples
> 400kHz use 8 samples
>100kHz use 20 samples
>=1.25kHz use 100 samples
>=10Hz use 1000 samples
all lower frequencies use 5000 samples
3. Waveform memory downloaded.
4. Analog gain set.
5. RC Filter chosen via 'Auto_Filter' function. This function chooses the best value given the number of samples
6. Sample period set.
7. Output enabled.
Choose a Filter
This button opens up a new GUI window which provides a list of buttons. Each button, when pressed, sets the RC filter based on the installed RC values on the PCB. It is important to note that if the user press 'Set Output' after 'Choose a Filter', 'Set Output' will override the selected value.
Frequency 'Sweep and Record'
The most important aspect of the function generator and the accompanying script is to test the frequency response of the subcutaneous transmitter(ex. A3028). The function generator can produce a frequency swept output with a constant peak to peak output voltage. This signal is injected into the input circuitry of the transmitter. The transmitter captures this data and sends it back to the host computer, where the fgen script takes control. The fgen script stores the captured data locally, and allows the user to record the data to file and/or plot the frequency response in the GUI.
Here is what happens step by step, including user interaction:
1. Open Fgen script.
2. Plug in the function generator, data receiver(A3027) into one or more LWDAQ drivers.
3. Enter the IP address, driver socket, driver mux socket(if appropriate) for the function generator and data receiver.
4. Note the values of the sweep points. Ensure these values are appropriate, and encompass the range of frequencies needed to test the transmitter. Default values work well, but can be fine tuned to provide more frequency response detail or reduce sweep time.
5. Set output voltage, and attach desired BNC attenuators.
6. Enter a unique transmitter ID.
7. Before pressing 'Sweep and Record', decide whether this data is intended to be stored in a text file. If so, click 'Record to file?'. Also, press 'Set File Name' and choose the name of the text file.
8. Press 'Sweep and Record'. This process can take upwards of 50 seconds, depending on the lowest frequency in the 'Sweep Points' dialog box. We download 5000 samples of waveform memory once, and alter the sample period thereafter to adjust the frequency.
9. Pressing the 'Plot Freq Response' will produce a new GUI window that plots Captured Value vs Frequency, with the frequency on the Y-axis and Capture value on the X-axis.
10. Typically, the user will then note whether the frequency response is acceptable. Provided it is, all that is needed to test another transmitter is to alter the 'Transmitter ID', and press 'Sweep and Record'.
Saving to a text file
There are many ways we can store data. One way is to have a separate text file for each transmitter. In this manner, all the past and current data for a single transmitter is stored within one text file. The script saves the Transmitter ID, the date and time of Record, and the captured data and frequency for each data point. This data is easily copied into Excel for further graphing. Another way to save the transmitter data is to have one single text file, and store all data for all transmitters. The script works quickest in this manner, as the user only has to change the transmitter ID for each measurement as opposed to changing both the ID and the file name.
The output voltage can be altered for the Frequency Sweep function. Also, to attenuate the signal to low enough levels for the transmitter, several BNC attenuators may need to be installed on the output BNC connector of the function generator. Failure to do so will cause the transmitter input circuitry to clip the incoming waveform, and produce inaccurate frequency response data.
Known Issues and Rework
1. No effective AC-coupled output. The analog gain resistors are tied to -1.65V in the schematic. The intent was to pull the bias point of the DAC output to 0V. This does not work. The PCB has been modified to remove U14, and place a 0 ohm resistor in C56 to tie the resistors to 0V. The result of this is there will always be a DC offset at the output of the generator. This DC offset will vary based on which gain resistors are switched into the DAC signal path. A possible temporary solution is to sacrifice one of the series resistors(R8-R11) in the RC filter by replacing one with a capacitor. Thus, the user could choose to select the capacitor in situations where AC coupling is desired. The A3031A has specific rework designed to tune the output to drive the input of a subcutaneous transmitter. The transmitter does not require AC coupling, so the temporary solution is not in place.
2. The externally powered +-15V switching regulators are not installed. These are necessary only when the user requires full 5V peak to peak output into a 50 ohm load. The transmitter input does not require this, so the parts are not installed.
3. One of the RAM data lines connecting to the CPLD is connected to a reserved port on the CPLD. The pcb trace was cut, and the line was rerouted to one of the generic test points.
4. The gain resistors have been selected to create as small a signal as possible at the output due to the transmitter input requiring a signal in the range of 50mV or so. The parasitic resistance of the analog gain switch is roughly 4 ohms, so we are limited by the minimum signal we can produce. We have added 2x 50 ohm attenuators to the generator output to further reduce the output voltage.
5. The MAX6329 is temperamental. When we initially plug in the function generator to the LWDAQ driver, most of the time it does not power up. Resetting the driver allows the device to power up. We have added a 'power on' LED to make it obvious when the device has not powered correctly. A future PCB spin will replace this circuit.