Implantable Stimulator-Transponder (A3041)

© 2022, Kevan Hashemi, Open Source Instruments Inc.




[03-FEB-22] The Implantable Stimulator-Transponder (A3041) receives commands through its crystal radio and applies stimuli to its two stimulus leads. The A3041 replaces all versions of the A3030, A3036, and A3037. The A3041 is powered by a non-rechargeable lithium primary cell. We ship the A3041 in its own box with a magnet that keeps it in its hibernating state. In its hibernation state, the A3041 consumes 0.5 μA. When we remove it from the magnetic field, the A3041 comes out of hibernation into its sleep state, in which it consumes 5 μA. When its crystal radio receives a command, the A3041 activates, in which state its logic circuits consume 200 μA. In the active state, the A3041 generates stimuli by applying either a constant voltage or a constant current to its stimulus leads. The A3041 uses its antenna to receive commands and also to transmit SCT messages that acknowledge receipt of commands, to provide battery voltage monitoring, and to provide a synchronizing signal when requested.

Figure: Implantable Stimulator-Transponder (A3041A) Sketch. Shows battery, circuit board, antenna, and leads, but no encapsulation. Add 0.5 mm all around for epoxy and silicone.

The A3041A provides two pins on the ends of its stimulus leads that we can connect to an Implantable Lamp (A3036IL) to provide optogenetic stimulation.

Volume of Implant≤0.70 ml
Mass of Implant≤1.6 g
Maximum Dimensions10 mm × 10 mm × 7 mm
Battery TypeCR1025 Coin Cell
Battery Capacity1250 μA-days
Hibernation Current0.5 μA
Hibernation Controlhibernates in magnetic field
Sleep Current5 μA
Activation Controlwireless
Active Current200 μA
Stimulus Voltage3.3 V
Stimulus Current<10 mA
Table: IST Specification, Version A3041A.

Variants of the A3041 provide constant-voltage stimulation at 3.0 V, 3.3 V, or 5.0 V, and constant-current stimulation at 100 μA, 200 μA, 500 μA, and 1000 μA.


Here are planned versions of the A3041.

Version Stimulus
Voltage (V)
Current (μA)
A3041A 3.3 <10 mA 1250 (CR1025) 0.70 1.6
Table: Primary Version Codes of A3041 Implantable Stimulator-Transponder


The A3041 is equipped with a 30-mm stranded-steel loop antenna that is used both for receiving commands and transmitting acknowledgements and battery voltage measurements.


The following files define the A3041 design. Note that we distribute all these files under the GNU Public License. Any design that incorporates any part of our work must itself be distributed under the same GNU Public License.

S3041A_1.gif: Crystal radio, logic, stimulator.
A304101A_Top: Top view of A304101A.
A304101A_Bottom: Bottom view of A304101A. Gerber files for A304101A Revision 1.
A3041AV1.ods: Bill of materials for A3041AV1.
A304101A.dxf: View of A304101A in drawing exchange format.
Code: Logic chip firmware library.
CR1025: Coin cell, 10-mm diameter, capacity 30 mAhr.


None yet.


[02-FEB-22] The A3041 will incorporate the following improvements compared to the A3036. Its synchronizing signal will turn itself off after sixty seconds. Its logic will run an OSR8 microprocessor so as to give us arbitray control over the stimulus. Its battery voltage measurement will be via a dedicated eight-bit DAC requiring not calibration. The logic will auto-calibrate the transmit clock period on start-up. The device will hibernate in a magnetic field in its shipping box, consuming less than 1 μA, then enter its sleep state when removed from the field, consuming 5 μA. With CR1025's 30-mAhr capacity, we have 6000 hrs = 36 weeks of sleep life while implanted, ignoring stimulus current. Stimulus current we assume will be of order 2 mA for optogenetics, following our study of FCLEDs in mice, where 1-ms flashes of 15 mA was sufficient to cause response with blue light, so 10-ms flashes of 1.5 mA should be sufficient. Because the current is ten times lower than we expected when we designed the A3036, we can switch out the A3036's lipo battery for a CR-series coin cell with three times the capacity per unit volume, and low enough source resistance to supply the LCMXO2-1200ZE with its startup current, and a lamp with 10 mA. We will make sure the lamp does not turn on when the device powers up. We will include resistors to allow us to turn on the device with a jumper when we tune the crystal radio.

[10-FEB-22] We are wondering if we can use the crystal radio's split capacitor tuner to create a resonator at the same frequency, and so tune both transmit and receive frequencies at the same time during production of the A3041. We build the following circuit using an A3038X. According to our calculations, the tuner should provide a phase shift of close to 180° just above its resonant frequency. Combined with the phase shift through a single-stage amplifier, we might see oscillation near the resonant frequency.

Figure: Prototype Split Capacitor Resonator Schematic.

In the tuner, we use the same inductors and capacitors as the A3038DM-E tuner. We start with R1 = 560 Ω and C2 = 10 pF. We connect a spectrometer to J1 and we connect J2 to an oscilloscope. The P output on J2 tells us the power at J1 in the range 50-6000 MHz. We use the spectrometer to measure frequency and stability of the peak.

Figure: Prototype Split Capacitor Resonator. Schematic designations marked in red.

With R1 = 560 Ω and C2 = 10 pF we adjust VC1 until our peak is at 905 MHz. Power is −20 dBm. With C2 increased to 100 pF we see 902 MHz −18 dBm. We drop R1 to 280 Ω and see 870 MHz −4 dBm. We adjust VC1 to get 917 MHz −10 dBm.

[14-FEB-22] Complete S3041_1 schematic. We have dropped the 10-μH, P1210 inductor used in the A3030E to a 4.7 μH P0805 inductor to save space, and anticipating that our output current will be no more than 10 mA. Our stimulus output switch is an npn transistor driven by a low-pass filter. If we know the current gain of this transistor, and the cut-off frequency of the filter is much lower than the frequency of our drive square wave, we can vary the duty cycle of the square wave to control the stimulus current. Our sleep switch is a p-channel mosfet.

[18-FEB-22] We decide against double-use of the split-capacitor tuner. When we add up all the parts it requires, we get no reduction in board area compared to a MAX2624, and we introduce uncertainty into the design. We plan to embed an OSR8 microprocessor in the logic of the IST. Because we have an ADC dedicated to measuring battery voltage, we can use our OSR8 microprocessor to compensate for drop in battery voltage when driving the tuning input of the MAX2623 or MAX2624, having established the correct DAC output value for a known battery voltage. We now have all logic IO banks connected to VA, which simplifies our layout.

[25-MAR-22] Working on the layout of the A304101A, a 400-mil square (10.2 mm square) implant with two extensions, battery pads on the North and South edges rather than at the corners, built-in zig-zag antenna, test points for calibration and tuning. We will be using 8-mil via-in-pad between top and bottom layer pads, as well as 4-mil microvias from top layer to middle layer in the WLCSP-25 ball grid array (BGA), see here for layout description and here for the BGA pinout.

[28-MAR-22] The A304101AR1 layout is complete. The implant circuit is 400-mil square (10.2-mm square).

[07-APR-22] Our A304101A layout has passed DFM and final netlist checks. We are waiting for quotes. Digi-Key has no stock of MCP6541, but we have 200 pieces on cut tape. We identify LPV7215 by TI in SC-70-5 package as a drop-in replacement, but it's out of stock too. We have a draft version of the firmware A01 based upon P3035A11. We use the new OSR8V3 CPU, which allows us to change the process and program memory space easily with generic constants. We set up the following memory map.

0-4095R/WProcess Memory
0-511R/WProcess Variables
512-1023R/WProgram Stack
2048-3071RCommand Memory
3072-4095R/WControl Space
3072 + 0RBattery Monitor Byte (read after access)
3072 + 1WSensor Control Register (write initiates access)
3072 + 2RInterrupt Request Bits (D0-D7: TMR, TXD, SAD, X, X, GPI1-3)
3072 + 3R/WInterrupt Mask Bits (store "1" to Dn to enable interrupt n)
3072 + 4WInterrupt Reset Bits (write "1" to Dn to clear interrupt n)
3072 + 5WInterrupt Set Bits (write "1" to Dn to set interrupt n)
3072 + 6R/WInterrupt Timer Period (multiple of RCK period = 30.52 μs)
3072 + 7WSystem Reset (D0 is SWRST)
3072 + 8WTransmit Hi Byte (D0-D7 are TD8-TD15)
3072 + 9WTransmit Lo Byte (D0-D7 are TD0-TD7)
3072 + 10WTransmit Channel Offset (channel = device_id + offset)
3072 + 11WTransmit Control Register (any write initiates transmission)
3072 + 12WTransmit Frequency Calibration (sets zero-bit frequency for transmitter)
3072 + 13WEnable Transmit Clock (D0 is ENTCK)
3072 + 14RTransmit Clock Frequency (0-255, multiple of RCK = 32.768 kHz)
3072 + 15WTransmit Clock Divider (0-15, divides ring oscillator to get TCK)
3072 + 16WBoost CPU Clock (D0 is BOOST)
3072 + 17WTest Point Register (D0-D7 are CPUTP0-CPUTP7)
3072 + 18RCommand Ready (non-zero if command received)
3072 + 19RCommand Count HI Byte (top byte of command byte count)
3072 + 20RCommand Count LO Byte (low byte of command byte count)
3072 + 21WCommand Processor Reset (any write resets)
3072 + 22WDevice Active (D0=1 asserts OND)
3072 + 23WStimulus Current (D0 sets ONL)
Table: Processor Memory Map. Each byte consists of bits D0-D7, where D0 is the least significant. Interrupts: TMR is Timer, TXD is Transmit Done, SAD is Serial Access Done, X are unused, GPI1-GPI3 general-purpose interrupts may be set by the processor.

Upon power-up, the Command Processor in the Main.vhd looks for a start pulse on RP. When it sees a start pulse, it asserts OND with its own Command Processor Active (CPA) signal. It receives command bytes carried by RP and stores them in the Command Memory. When the command ends, due to lack of RP for the termination pulse length, if the checksum of the command is correct, the Command Processor asserts Command Ready (CMDRDY) and waits for Command Processor Reset (CPRST). The Command Processor will continue to assert OND with CPA until it is reset. The number of bytes it stored is available to the CPU at the command count locations. After power-up, the CPU must poll the command ready location. When it sees a command, it reads out and processes all the command bytes, except for the final two, which are the checksum. The CPU can then decide whether to assert OND through Device Active (DACTIVE) before writing to the Command Processor Reset location to restore the Command Processor, which will un-assert CPA. If the CPU has not set DACTIVE, the power will turn off.

In the A3041, the positive stimulus voltage is always driven while the device is active. As soon as VA is asserted, S+ pumps up to 3.3 V or 5.0 V, depending upon our choice of U6. For implantable lamps, we'll have 3.3 V connected to an LED with forward voltage 3.0 V. With ONL unasserted, the S− will float up to S+ immediately. We assert and unassert the ONL signal with the Stimulus Current location. The ONL signal passes through R6 to drive C9 and the base of Q2. With 33 kΩ and 10 nF, the time constant of the low-pass filter formed by R6 and C9 is 330 μs. We will measure the current gain of Q2, 2SC6026MFV. Assume gain is 200, base-emitter drop 600 mV. With ONL set at VA = 2.6 V we have base current 60 μA and collector current 12 mA. If we are driving 50-Ω leads and a 3.0-V LED with 3.3 V we cannot deliver more than 6 mA, so Q2 will saturate and S− will be around 50 mV. If we modulate ONL, the current flowing into S− will be 12 mA multiplied by the duty cycle of ONL, provided the load does not restrict the current. If we want to deliver a 200-μA electrical stimulus in a 10-ms pulse at 1 Hz, we use the processor's 5 MHz boost clock speed to run a counter from 0 to 59 and assert ONL on count 0 only. We deliver 833 such pulses on ONL in the 10-ms stimulus pulse length.

The A3041 allows us to measure the regulated 1V2 power supply with respect to VA with an eight-bit ADC, U9. The CPU reads the ADC by writing to the sensor control register, which turns on the transmit clock and uses it to read the ADC in about 5 μs. The CPU can read the result in the battery monitor location. If this eight-bit value is x, the current value of VA is 1.2 × 255 / x, which the CPU can of course work out for itself. Having figured out the battery voltage, the CPU can adjust the value it uses on the 5-bit transmit frequency control DAC so as to compensate for variable battery voltage during the life of the device. In previous implants, we have used a regulated voltage for the I/O banks that drive the DAC, but in this case we simplified routing by using VA.

The A3041 auto-calibrates its own ring oscillator upon power up, just like the A3035, so we have TCK set to 5.0 MHz to within 5%. We still have to obtain a value for the transmit low frequency that we should apply to the transmit DAC for a reference battery voltage of 2.6 V, and put this in the software that runs on in the A3041's CPU. Or, we could transmit a calibration value to the A3041 with every command, having measured the center frequency of each one and stored the calibration value with the device identifier. Suppose we give the A3041 a twenty-four bit identifier for command reception. Each one will be unique, so we can keep calibration constants on-line and use them to calibrate the stimulator when it wakes up.